This invention relates to signal processing circuits and in particular to an LSI-CMOS/SOS implemented programmable arithmetic logic unit.
The signal processing requirements of advanced radar and communications systems are currently calling for higher speed digital data processing with low power devices. A typical signal processing application in this category is the USAF "HALO signal processor" which requires high speed (8-16 MHz) bit sliced, pipelined computation of large arrays in space at low power.
State-of-the-art signal processing elements are generally incapable of producing these processing speeds at acceptable power levels. The most effective processing element currently available is the RCA Corporation "ATMAC data execution unit" that is developed from CMOS/SOS for very high speed and low power sequential operation. The ATMAC unit, however, does not execute its arithmetic operation simultaneously and therefore is effectively slower than the processing speeds required. Also the ATMAC unit cannot input and output data simultaneously and it utilizes a single shared bus. The single shared bus uses more power due to the additional capacitance loads that must be driven.
The programmable arithmetic logic unit of the present invention is microprogrammable and operates in conjunction with a fast microprogram store (control store) program memory and a program controller. As distinguished from the RCA device and other prior art processing elements it performs all of its operations simultaneously at high speed--low power factor related to the CMOS/SOS technology. Power requirements are reduced by means of an 8:1 input multiplexer and separate input and output buses. It simultaneously performs duel port 8:1 input data selection and fetch, shifts either port left or right, complements, adds, compares, and provides a latched tri-state output to an external device. All of these operations are programmable and are performed simultaneously in one clock period. The overall effect of the combination of techniques and improvements is to provide a processing device having increased processing speed and reduced power requirements.